Advanced Cleaning & Surface Preparation: Technologies and Markets, 2015—2020
Implications for Cleaning and Surface Preparation
Effective cleaning has been pivotal to the evolution of the semiconductor industry. Improvements in materials for removing contaminants and residues from earlier process steps have led to higher yields and enabled new integration schemes.
Cleaning and stripping are the most common operations in IC manufacturing. The challenges in preparing the wafer surface for the subsequent process steps have increased significantly, driven by materials changes, critical defect size and the increasing use of high aspect ratio features.
Total Cleaning Chemicals Market
Advanced Cleaning & Surface Preparation covers leading applications for wet chemicals utilized in the global semiconductor industry including formulated cleans, solvent strips and critical SPM cleaning steps. The report also provides analyses of leading suppliers and supplier shares of wet process chemicals and forecasts industry growth to 2020.
In the sixth edition of Advanced Cleaning & Surface Preparation, Linx has uncovered several trends in cleaning and surface preparation:
Shrinking Device Features
Shrinking device features will challenge cleaning technologies to deliver new capabilities and higher levels of particle removal with every generation. These shrinking geometries will challenge clean technologies to move beyond purely undercutting particulates to removal without loss of the underlying substrate.
3D Gate structures and stacked storage devices will constrain chemical and physical approaches to cleaning, requiring novel technologies to achieve defect free results. In addition, three-dimensional structures will have extreme aspect ratios, and very challenging mass transport requirements for the removal of contaminants from deep structures.
Sub 20 nm Particle Control
Sub 20 nm particle control for future semiconductor technologies will challenge both cleaning technologies and metrology in removal efficiency, and detection capability.
Application of novel technologies to 300 mm wafers, and the possibility of further wafer size increases early next decade will challenge equipment and process designers in terms of cost wafer uniformity of process results.
10 nm Cleaning Technology
Introduction of germanium PMOS has been delayed, but is regarded as a likely solution at 10 nm. However, the introduction of III-V NMOS technologies is likely to be pushed back even further, or be discontinued altogether, due to the difficulty of terminating stacking defects along the fin direction.
Learn more about CSP Technologies & Markets
In Cleaning and Surface Prep Technologies and Markets, Linx evaluates:
- FEOL clean operations for FEOL PCMP, FEOL critical cleans, and FEOL resist strips
- BEOL clean operations for Cu backside and bevel cleans, BEOL Cu PCMP, BEOL Cu PERR, BEOL Al PCMP
- All cleans by node
- Aluminum BEOL PERR Cleans
- Copper BEOL PERR Cleans
- Cu PERR Process Mix
- PERR Market
- PMPC Market
- Wafer RDL & Bump Strip
Cleaning and Surface Prep Technologies and Markets also offers cleaning chemical market share estimates including leading suppliers of:
- All cleaning chemicals
- Wet cleaning chemicals
- Aluminum PERR
- Advanced Al PERR
- Cu PERR
- Advanced Cu PERR
- Post CMP cleaning
1. Executive Summary
- 2015—2020 consumption of materials
- Growth rates by cleaning technology
2. Methodology and Background
3. Forecast Drivers
- Segmentation by device type
- Map unit operations by device type
4. Technology Evolution
- Wafer Fab Processes
- Technology trends by device type
- ASIC, DRAM, NAND, etc.
- Cleaning Chemical Review
- Wet and formulated chemical volume demand and market, 2015 — 2020
- Formulated Cleans
- Post Etch Residue Removers
- Post CMP Cleans
- Critical Cleans
- Wet Chemicals
6. Supplier Analysis
- Supplier share by application
- Company Review
- Supplier Global Footprint